JOBS / Anthropic
Research Engineer, Chip Design RL
San Francisco, CA
Role
The role involves developing reinforcement learning environments and evaluations for agentic RTL generation and silicon design. Candidates must have expertise in ASIC or FPGA design, including RTL, verification, and physical design, and be fluent with industry EDA tools.
Location: San Francisco, CA
Employment: full time
Work pattern: hybrid
Seniority: unspecified
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Source and currency
This vacancy came from the organization’s official Greenhouse feed. Source update: 2026-10-21T15:30:55-04:00. Check the employer’s page for the complete description, current availability and application terms.