JOBS / OpenAI

Design Verification Engineer

San Francisco

Role

The role involves verifying functional correctness for custom AI silicon, ranging from IP blocks to full SoC. Candidates must have 3+ years of hardware verification experience and proficiency in SystemVerilog and UVM.

Location: San Francisco
Employment: unspecified
Work pattern: unspecified
Seniority: unspecified

SystemVerilogUVMHardware VerificationSoC DesignComputer Architecture

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Source and currency

This vacancy came from the organization’s official Ashby feed. Source update: 2025-10-29T23:58:08.025+00:00. Check the employer’s page for the complete description, current availability and application terms.

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